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台積電-臺灣大學聯合研發中心

近五年重要論文(摘錄)

序號論文名稱姓名發表刊物/研討會名稱卷期
1Recent progress in undoped group-IV heterostructures for quantum technologiesChia-Tse Tai and Jiun-Yun Li (李峻霣)Materials for Quantum TechnologyVolume 4
2Study and Optimization of Two-State Transient Currents at Millisecond Time Scales in MIS Tunnel DiodesSung-Wei Huang and Jenn-Gwo Hwu (胡振國)IEEE Transactions on Electron DevicesVolume 70
3Improved Scalability of Negative Capacitance Junctionless Transistors with Underlap DesignM. Gupta and V. P.-H. Hu (胡璧合)IEEE Transactions on Electron DevicesVolume 70
4Fatigue Mechanism of Antiferroelectric Hf0.1Zr0.9O2 Toward Endurance Immunity by Opposite Polarity Cycling Recovery (OPCR) for eDRAM K.-Y. Hsiang, J.-Y. Lee, Z.-F. Lou, F.-S. Chang, Y.-C. Chen, Z.-X. Li, M. H. Liao, C. W. Liu, T.-H. Hou, P. Su, and M. H. Lee (李敏鴻)IEEE Transactions on Electron DevicesVolume 70
5Three-Level MIS Antifuse Formed by Polarity-Dependent Dielectric Breakdown on 3.5 nm SiO2 for One-Time Programmable ApplicationSung-Wei Huang and Jenn-Gwo Hwu (胡振國)IEEE Transactions on Electron DevicesVolume 70
6Atomic layer engineering on resistive switching in sub-4 nm AlN resistive random access memoryChen-Hsiang Ling, Chi-Lin Mo, Chun-Ho Chuang, Jing-Jong Shyue, and Miin-Jang Chen(陳敏璋)Journal of Materials Chemistry C
7Impact of monolayer engineering on ferroelectricity of sub-5 nm Hf0.5Zr0.5O2 thin filmsTing-Yun Wang, Chi-Lin Mo, Chun-Yi Chou, Chun-Ho Chuang, and Miin-Jang Chen(陳敏璋)Acta MaterialiaVolume 250
8Wake-up-free ferroelectric Hf0.5Zr0.5O2 thin films characterized by precession electron diffractionTeng-Jan Chang, Hsing-Yang Chen, Chin-I Wang, Hsin-Chih Lin, Chen-Feng Hsu, Jer-Fu Wang, Chih-Hung Nien, Chih-Sheng Chang, Iuliana P. Radu, and Miin-Jang Chen(陳敏璋)Acta MaterialiaVolume 246
9Inhibitor-Free Area-Selective Atomic Layer Deposition with Feature Size Down to Nearly 10 nmChun-Yi Chou, Chi-Lin Mo, Chih-Piao Chuu, Ting-Yun Wang, Chin-Chao Huang, Cheng-Hung Hou, Chun-Ho Chuang, Yu-Sen Jiang, Jing-Jong Shyue, and Miin-Jang Chen(陳敏璋)Chemistry of MaterialsVolume 35
10Room-Temperature Negative Differential Resistance and High Tunneling Current Density in GeSn Esaki DiodesChia-You Liu, Kai-Ying Tien, Po-Yuan Chiu, Yu-Jui Wu, Yen Chuang, Hsiang-Shun Kao, and Jiun-Yun Li (李峻霣)Advanced MaterialsVolume 34
11Dielectric Layer Design of Bilayer Ferroelectric and Antiferroelectric Tunneling Junctions Toward 3D NAND-Compatible ArchitectureK.-Y. Hsiang, C.-Y. Liao, J.-H. Liu, C.-Y. Lin, J.-Y. Lee, Z.-F. Lou, F.-S. Chang, W.-C. Ray, Z.-X. Li, H.-C. Tseng, C.-C. Wang, M. H. Liao, T.-H. Hou, and M. H. Lee (李敏鴻)IEEE Electron Device LetterVolume 43
12Mechanisms of instability retention for ferroelectric field effect transistors with HfZrO2 gate stack scaling downChun-Yu Liao, Chen-Ying Lin, Zhi-Xian Li, Kuo-Yu Hsiang, Zhao-Feng Lou, Vita Pi-Ho Hu(胡璧合), and Min-Hung Lee (李敏鴻)Applied Physics LettersVolume 121
13Ferroelectric ZrO2 ultrathin films on silicon for metal-ferroelectric-semiconductor capacitors and transistorsYu-Sen Jiang, Kuei-Wen Huang, Sheng-Han Yi, Chin-I Wang, Teng-Jan Chang, Wei-Chung Kao, Chun-Yuan Wang, Yu-Tung Yin, Jay Shieh, Miin-Jang Chen (陳敏璋)2022 Journal of the European Ceramic SocietyVolume 42
14Improved Two States Characteristics in MIS Tunnel Diodes by Oxide Local Thinning Enhanced Transient Current BehaviorSung-Wei.Huang and Jenn-Gwo Hwu (胡振國) IEEE Transactions on Electron DevicesVolume 69
153D Stackable Vertical Ferroelectric Tunneling Junction (V-FTJ) with on/off Ratio 1500x, Applicable Cell Current, Self-Rectifying Ratio 1000x, Robust Endurance of 109 Cycles, Multilevel and Demonstrated Macro Operation Toward High-Density BEOL NVMsJ.-Y. Lee, F.-S. Chang, K.-Y. Hsiang, P.-H. Chen, Z.-F. Luo, Z.-X. Li, J.-H. Tsai, C. W. Liu (劉致為), and M. H. Lee(李敏鴻)2023 Symposium on VLSI Technology and Circuits (VLSI)
16FeRAM Recovery up to 200 Periods with Accumulated Endurance 1012 Cycles and an Applicable Array Circuit toward Unlimited eNVM OperationsK.-Y. Hsiang, J.-Y. Lee, F.-S. Chang, Z.-F. Lou, Z.-X. Li, Z.-H. Li, J.-H. Chen, C. W. Liu, T.-H. Hou, and M. H. Lee (李敏鴻)2023 Symposium on VLSI Technology and Circuits (VLSI)
17Extremely High-k Hf0.2Zr0.8O2 Gate Stacks Integrated into Ge0.95Si0.05 Nanowire and Nanosheet nFETs Featuring Respective Record ION per Footprint of 9200μA/μm and Record ION per Stack of 360μA at VOV=VDS=0.5VYi-Chun Liu, Yu-Rui Chen, Yun-Wen Chen, Hsin-Cheng Lin, Wan-Hsuan Hsieh, Chien-Te Tu, Bo-Wei Huang, Wei-Jen Chen, Chun-Yi Cheng, Shee-Jier Chueh, and C. W. Liu (劉致為)2023 Symposium on VLSI Technology and Circuits (VLSI)
18First Stacked Nanosheet FeFET Featuring Memory Window of 1.8V at Record Low Write Voltage of 2V and Endurance >1E11 CyclesYu-Rui Chen, Yi-Chun Liu, Zefu Zhao, Wan-Hsuan Hsieh, Jia-Yang Lee, Chien-Te Tu, Bo-Wei Huang, Jer-Fu Wang, Shee-Jier Chueh, Yifan Xing, Guan-Hua Chen, Hung-Chun Chou, Dong Soo Woo, M. H. Lee, and C. W. Liu (劉致為)2023 Symposium on VLSI Technology and Circuits (VLSI)
19Towards Epitaxial Ferroelectric HZO on n+-Si/Ge Substrates Achieving Record 2Pr = 84 μC/cm2 and Endurance > 1E11Zefu Zhao, Yu-Rui Chen, Yun-Wen Chen, Wan-Hsuan Hsieh, Jer-Fu Wang, Jia-Yang Lee, Yifan Xing, Guan-Hua Chen, and C. W. Liu (劉致為)2023 Symposium on VLSI Technology and Circuits (VLSI)
20First Demonstration of a-IGZO GAA Nanosheet FETs Featuring Achievable SS=61 mV/dec, Ioff<10-7mA/mm, DIBL=44 mV/V, Positive VT, and Process Temp. of 300 oCJih-Chao Chiu, Eknath Sarkar, Yuan-Ming Liu, Yu-Ciao Chen, Yu-Cheng Fan, and C. W. Liu (劉致為)2023 Symposium on VLSI Technology and Circuits (VLSI)
21Energy- and Area-Efficient 8T SRAM Cell with FEOL CFETs and BEOL-Compatible TransistorsM. Lee, Z.-Y. Huang, S.-F. Fang, Y.-C. Lu, and V. P.-H. Hu (胡璧合)2022 IEEE International Electron Devices Meeting (IEDM)
22First Demonstration of Monolithic 3D Self-aligned GeSi Channel and Common Gate Complementary FETs by CVD Epitaxy Using Multiple P/N Junction IsolationChien-Te Tu, Yi-Chun Liu, Bo-Wei Huang, Yu-Rui Chen, Wan-Hsuan Hsieh, Chung-En Tsai, Shee-Jier Chueh, Chun-Yi Cheng, Yichen Ma, and C. W. Liu (劉致為)2022 IEEE International Electron Devices Meeting (IEDM)
23Novel Opposite Polarity Cycling Recovery (OPCR) of HfZrO2 Antiferroelectric-RAM with an Access Scheme Toward Unlimited EnduranceK.-Y. Hsiang, Y.-C. Chen, F.-S. Chang, C.-Y. Lin, C.-Y. Liao, Z.-F. Lou, J.-Y. Lee, W.-C. Ray, Z.-X. Li, C.-C. Wang, H.-C. Tseng, P.-H. Chen, J.-H. Tsai, M. H. Liao, T.-H. Hou, C. W. Liu (劉致為), P.-T. Huang, P. Su, and M. H. Lee (李敏鴻)2022 IEEE International Electron Devices Meeting (IEDM)
24Superlattice HfO2-ZrO2 based Ferro-Stack HfZrO2 FeFETs: Homogeneous-Domain Merits Ultra-Low Error, Low Programming Voltage 4 V and Robust Endurance 109 cycles for Multibit NVMC.-Y. Liao, Z.-F. Lou, C.-Y. Lin, A. Senapati, R. Karmakar, K.-Y. Hsiang, Z.-X. Li, W.-C. Ray, J.-Y. Lee, P.-H. Chen, F.-S. Chang, H.-H. Tseng, C.-C. Wang, J.-H. Tsai, Y.-T. Tang, S. T. Chang (張書通), C. W. Liu (劉致為), S. Maikap (麥凱), and M. H. Lee (李敏鴻)2022 IEEE International Electron Devices Meeting (IEDM)
25Interfacial-Layer Design for Hf1-xZrxO2-Based FTJ Devices: From Atom to ArrayH.-L. Chiang, J.-F. Wang, K.-H. Lin, C.-H. Nien, J.-J. Wu, K.-Y. Hsiang, C.-P. Chuu, Y.-W. Chen, X.W. Zhang, C. W. Liu (劉致為), Tahui Wang, C.-C. Wang, M.-H. Lee (李敏鴻), M.-F. Chang, C.-S. Chang, and T.C. Chen2022 Symposia on VLSI Technology and Circuits (VLSI)
26Nearly Ideal Subthreshold Swing and Delay Reduction of Stacked Nanosheets Using Ultrathin BodiesChung-En Tsai, Chun-Yi Cheng, Bo-Wei Huang, Hsin-Cheng Lin, Tao Chou, Chien-Te Tu, Yi-Chun Liu, Sun-Rong Jan, Yu-Rui Chen, Wan-Hsuan Hsieh, Kung-Ying Chiu, Shee-Jier Chueh, and C. W. Liu (劉致為)2022 Symposia on VLSI Technology and Circuits (VLSI)
27Endurance > 1011 Cycling of 3D GAA Nanosheet Ferroelectric FET with Stacked HfZrO2 to Homogenize Corner Field Toward Mitigate Dead Zone for High-Density eNVMC.-Y. Liao, K.-Y. Hsiang, Z.-F. Lou, H.-C. Tseng, C.-Y. Lin, Z.-X. Li, F.-C. Hsieh, C.-C. Wang, F.-S. Chang, W.-C. Ray, Y.-Y. Tseng, S. T. Chang, T.-C. Chen, and M. H. Lee (李敏鴻)2022 Symposia on VLSI Technology and Circuits (VLSI)
28High-Density and High-Speed 4T FinFET SRAM for Cryogenic ComputingV. P.-H. Hu (胡璧合), Chang-Ju Liu, Hung-Li Chiang, Jer-Fu Wang, Chao-Ching Cheng, Tzu-Chiang Chen, and Meng-Fan Chang2021 IEEE International Electron Devices Meeting (IEDM)
29Contact Engineering for High-Performance N-Type 2D Semiconductor TransistorsY. Lin, P.-C. Shen, C. Su, A.-S. Chou, T. Wu, C.-C. Cheng, J.-H. Park, M.-H. Chiu, A.-Y. Lu, H.-L. Tang, M. M. Tavakoli, G. Pitner, X. Ji, C. McGahan, X. Wang, Z. Cai, N. Mao, J. Wang, Y. Wang, W. Tisdale, X. Ling, K. E. Aidala, V. Tung, J. Li1 , A. Zettl, C.-I. Wu(吳志毅), Jing Guo, H. Wang, J. Bokor, T. Palacios, L.-J. Li , J. Kong2021 IEEE International Electron Devices Meeting (IEDM)
30Antimony Semimetal Contact with Enhanced Thermal Stability for High Performance 2DElectronics,A-S Chou, T. Wu, C-C Cheng, S-S Zhan, I-C Ni, S-Y Wang, Y-C Chang, S-L Liew,E.Chen, W-H Chang, C-I Wu (吳志毅), J. Cai, H.-S. Philip Wong and H. Wang2021 IEEE International Electron Devices Meeting (IEDM)
31Highly Stacked 8 Ge0.9Sn0.1 Nanosheet pFETs with Ultrathin Bodies (~3nm) and Thick Bodies (~30nm) Featuring the Respective Record ION/IOFF of 1.4x107 and Record ION of 92μA at VOV=VDS= -0.5V by CVD Epitaxy and Dry EtchingChung-En Tsai, Yi-Chun Liu, Chien-Te Tu, Bo-Wei Huang, Sun-Rong Jan, Yu-Rui Chen, Jyun-Yan Chen, Shee-Jier Chueh, Chun-Yi Cheng, Chia-Jung Tsen, Yichen Ma, and C. W. Liu (劉致為)2021 IEEE International Electron Devices Meeting (IEDM)
32First Demonstration of Interface-Enhanced SAF Enabling 400oC-Robust 42 nm p-SOT-MTJ Cells with STT-Assisted Field-Free Switching and Composite ChannelsYa-Jui Tsou, Kai-Shin Li, Jia-Min Shieh, Wei-Jen Chen, Hsiu-Chih Chen, Yi-Ju Chen, Cho-Lun Hsu, Yao-Min Huang, Fu-Kuo Hsueh, Wen-Hsien Huang, Wen-Kuan Yeh, Huan-Chi Shih, Pang-Chun Liu, C. W. Liu (劉致為), Yu-Shen Yen, Chih-Huang Lai, Jeng-Hua Wei, Denny D. Tang, and Jack Yuan-Chen Sun2021 Symposium on VLSI Technology
33First Highly Stacked Ge0.95Si0.05 nGAAFETs with Record ION = 110 μA (4100 μA/μm) at VOV=VDS=0.5V and High Gm,max = 340 μS (13000 μS/μm) at VDS=0.5V by Wet EtchingYi-Chun Liu, Chien-Te Tu, Chung-En Tsai, Yu-Rui Chen, Jyun-Yan Chen, Sun-Rong Jan, Bo-Wei Huang, Shee-Jier Chueh, Chia-Jung Tsen, and C. W. Liu (劉致為)2021 Symposium on VLSI Technology
34First Demonstration of Multi-VT Stacked Ge0.87Sn0.13 Nanosheets by Dipole-Controlled ALD WNxCy Work Function Metal with Low Resistivity and Thermal Budget ≤ 400 °CChung-En Tsai, Yu-Rui Chen, Chien-Te Tu, Yi-Chun Liu, Jyun-Yan Chen, and C. W. Liu (劉致為) 2021 Symposium on VLSI Technology
35Strain Effects On Rashba Spin-Orbit Coupling Of Two-Dimensional Hole Gases In Gesn/Ge HeterostructuresChia-Tse Tai, Po-Yuan Chiu, Chia-You Liu, Hsiang-Shun Kao, C. T. Harris, T. M. Lu, C. T. Hsieh, S. W. Chang, and Jiun-Yun Li (李峻霣)Advanced MaterialsVolume 33
36Ultralow Contact Resistance Between Semimetal And Monolayer SemiconductorsPin-Chun Shen, Cong Su, Yuxuan Lin, Ang-Sheng Chou, Chao-Ching Cheng, Ji-Hoon Park, Ming-Hui Chiu, Ang-Yu Lu, Hao-Ling Tang, Mohammad Mahdi Tavakoli, Gregory Pitner, Xiang Ji, Zhengyang Cai, Nannan Mao, Jiangtao Wang, Vincent Tung, Ju Li, Jeffrey Bokor, Alex Zettl, Chih-I Wu (吳志毅), Tomás Palacios1, Lain-Jong Li, Jing KongNatureVolume 593
37Capacitance Matching By Optimizing The Geometry Of A Ferroelectric Hfo2-Based Gate For Voltage AmplificationK.-T. Chen, K.-Y. Hsiang, C.-Y. Liao, S.-H. Chang, F.-C. Hsieh, J.-H. Liu, S.-H. Chiang, H. Liang, S. T. Chang (張書通), M. H. Lee (李敏鴻)Journal of Computational Electronics
38Multibit Ferroelectric Fet Based On Nonidentical Double Hfzro2 For High-Density Nonvolatile MemoryC.-Y. Liao, K.-Y. Hsiang, F.-C. Hsieh, S.-H. Chiang, S.-H. Chang, J.-H. Liu, C.-F. Lou, C.-Y. Lin, T.-C. Chen, C.-S. Chang, and M. H. Lee (李敏鴻)IEEE Electron Device LettersVolume 42
39Sub-7-Nm Textured Zro2 With Giant FerroelectricityKuei-Wen Huang, Sheng-Han Yi, Yu-Sen Jiang, Wei-Chung Ka, Yu-Tung Yin, David Beck, Vladimir Korolkov, Roger Proksch, Jay Shien, Miin-Jang Chen (陳敏璋)Acta MaterialiaVolume 205
40Ferroelectric Undoped-Hfox Capacitor With Symmetric Synaptic For Neural Network AcceleratorJun-Dao Luo, Yu-Ying Lai, Kuo-Yu Hsiang, Chia-Feng Wu, Yun-Tien Yeh, Hao-Tung Chung, Yi-Shao Li, Kai-Chi Chuang, Wei-Shuo Li, Chun-Yu Liao, Pin-Guang Chen, Kuan-Neng Chen, Min-Hung Lee (李敏鴻), and Huang-Chung ChengIEEE Transactions on Electron Devices Volume 68
41Enhanced Electrical Performance Of Van Der Waals HeterostructureLei Xu, Yun-Yuan Wang, Chih-Hsiang Hsiao, I-Chih Ni, Mei-Hsin Chen, and Chih-I Wu (吳志毅)Advanced Materials InterfacesVolume 8
42First Demonstration of Uniform 4-Stacked Ge0.9Sn0.1 Nanosheets with Record ION=78mA at VOV=VDS= -0.5V and Low Noise Using Double Ge0.95Sn0.05 Caps, Dry Etch, Low Channel Doping, and High S/D DopingYu-Shiang Huang, Chung-En Tsai, Chien-Te Tu, Jyun-Yan Chen, Hung-Yu Ye, Fang-Liang Lu, and C. W. Liu (劉致為)2020 IEEE International Electron Devices Meeting (IEDM)
43Operation Bandwidth Of Negative Capacitance Characterized By Frequency Response Of Capacitance Magnification In Ferroelectric/Dielectric StacksYu-Sen Jiang, Yu-En Jeng, Yu-Tung Yin, Kuei-Wen Huang, Teng-Jan Chang, Chin-I Wang, Yu-Ting Chao, Chao-Hsin Wu, and Miin-Jang Chen (陳敏璋)Journal of Materials Chemistry CVolume 9
44Simulation On The Electric Field Effect Of Bi Thin FilmLee-Chi Hong, Cheih Chou, and Hao-Hsiung Lin (林浩雄)Solid State Electronics LettersVolume 2
45Hole Mobility Calculation For Monolayer Molydenum Tungsten Alloy DisulfideMing-Ting Wu, Cheng-Hsien Yang, Yun-Fang Chung, Kuan-Ting Chen, and Shu-Tong Chang (張書通)Journal of Nanoscience and NanotechnologyVolume 20
46Random Polarization Distribution Of Multi-Domain Model For Polycrystalline Ferroelectric Hfzro2K.-T. Chen, C.-Y. Liao, K.-Y. Hsiang, S.-H. Chang, F.-J. Hsieh, H. Liang, S.-H. Chiang, J.-H. Liu, K.-S. Li, S. T. Chang(張書通), and M. H. Lee (李敏鴻)Semiconductor Science and TechnologyVolume 35
47Paraelectric /Antiferroelectric/Ferroelectric Phase Transformation In As-Deposited Zro2 Thin Films By The Tin Capping EngineeringChun-Yuan Wang, Chin-I Wang, Sheng-Han Yi, Teng-Jan Chang, Chun-Yi Chou, Yu-Tung Yin, Makoto Shiojiri, and Miin-Jang Chen (陳敏璋)Materials and DesignVolume 195
48Coupling Sensitivity In Concentric Metal-Insulator-Semiconductor Tunnel Diodes By Controlling The Lateral Injection ElectronsKung-Chu Chen, and Jenn-Gwo Hwu (胡振國)AIP AdvancesVolume 10
49Sub-Nanometer Heating Depth Of Atomic Layer AnnealingWei-Hao Lee, Wei-Chung Kao, Yu-Tung Yin, Sheng-Han Yi, Kuei-Wen Huang, Hsin-Chih Lin, and Miin-Jang Chen (陳敏璋)Applied Surface ScienceVolume 525
50Forming-Free, Nonvolatile, And Flexible Resistive Random-Access Memory Using Bismuth Iodide/Van Der Waals Materials HeterostructuresChia-Shuo Li, Sheng-Wen Kuo, Yu-Tien Wu, Fang-Yu Fu, I-Chih Ni, Mei-Hsin Chen, and Chih-I Wu (吳志毅)Advanced Materials Interfaces Volume 7
51Low Contact Resistivity To Ge Using In-Situ B And Sn Incorporation By Chemical Vapor DepositionChung-En Tsai, Fang-Liang Lu, Yi-Chun Liu, Hung-Yu Ye, and C. W. Liu (劉致為)IEEE Transactions on Electron DevicesVolume 67
52Studies Of 2D Bulk And Nanoribbon Band Structures In Moxw1–Xs2 Alloy System Using Full Sp3D5 Tight‐Binding ModelTsung-Yin Tsai, Pin-Fang Chen, Shu-Wei Chang, and Yuh-Renn Wu (吳育任)Physica Status Solidi (b) Volume 258
53Ferroelectric Hfzro2 With Electrode Engineering And Stimulation Schemes As Symmetric Analog Synaptic Weight Element For Deep Neural Network TrainingK.-Y. Hsiang, C.-Y. Liao, K.-T. Chen, Y.-Y. Lin, C.-Y. Chueh, C. Chang, Y.-J. Tseng, Y.-J. Yang, S. T. Chang(張書通), M.-H. Liao, T.-H. Hou, C.-H. Wu, C.-C. Ho, J.-P. Chiu, C.-S. Chang, and M. H. Lee (李敏鴻)IEEE Transactions on Electron Devices Volume 67
54Optical Detection Of Parasitic Channels Of Vertically Stacked Ge0.98Si0.02 NgaafetsShih-Ya Lin, Hsiao-Hsuan Liu, Chien-Te Tu, Yu-Shiang Huang, Fang-Liang Lu, and C. W. Liu (劉致為)IEEE Transactions on Electron DevicesVolume 67
55Edge-Etched Al2O3 Dielectric As Charge Storage Region In A Coupled Mis Tunnel Diode SensorBo-Jyun Chen and Jenn-Gwo Hwu (胡振國)IEEE Journal of the Electron Devices SocietyVolume 8
56Variational Quantum Circuits For Deep Reinforcement LearningS. Y. Chen, C. H. Yang, J. Qi, P. Chen, X. Ma and H.-S. Goan (管希聖)IEEE AccessVolume 8
57On-Current Enhancement In Treefet By Combining Vertically Stacked Nanosheets And InterbridgesHung-Yu Ye and C. W. Liu (劉致為)IEEE Electron Device LettersVolume 41
58Full-Polaron Master Equation Approach To Dynamical Steady States Of A Driven Two-Level System Beyond The Weak System-Environment CouplingC.-C. Chen, T. M. Stace, and H.-S. Goan (管希聖)Physical Review BVolume 102
59Luminescence Enhancement And Dual-Color Emission Of Stacked Mono-Layer 2D MaterialsPo-Cheng Tsai, Hon-Chin Huang, Chun-Wei Huang, Shoou-Jinn Chang, and Shih-Yen Lin (林時彥)NanotechnologyVolume 31
60High On-Current 2D nFET of 390 μA/μm at VDS = 1V using Monolayer CVD MoS2 without Intentional DopingAng-Sheng Chou, Pin-Chun Shen, Chao-Ching Cheng, Li-Syuan Lu, Wei-Chen Chueh, Ming-Yang Li, Gregory Pitner, Wen-Hao Chang, Chih-I Wu (吳志毅), Jing Kong, Lain-Jong Li, and H.-S. Philip Wong2020 Symposium on VLSI Technology
61First Demonstration of 4-Stacked Ge0.915Sn0.085 Wide Nanosheets by Highly Selective Isotropic Dry Etching with High S/D Doping and Undoped ChannelsYu-Shiang Huang, Fang-Liang Lu, Chien-Te Tu, Jyun-Yan Chen, Chung-En Tsai, Hung-Yu Ye, Yi-Chun Liu and C. W. Liu (劉致為)2020 Symposium on VLSI Technology
62Record Low Contact Resistivity to Ge:B (8.1x10-10Ω-cm2) and GeSn:B (4.1x10-10Ω-cm2) with Optimized [B] and [Sn] by In-situ CVD DopingFang-Liang Lu, Yi-Chun Liu, Chung-En Tsai, Hung-Yu Ye, and C. W. Liu (劉致為)2020 Symposium on VLSI Technology
63Interpretable Neural Network to Model and to Reduce Self-Heating of FinFET CircuitryChia-Che Chung, Hsin-Cheng Lin, H. H. Lin, W. K. Wan, M.-T. Yang, and C. W. Liu (劉致為)2020 Symposium on VLSI Technology
64Analysis And Optimization Of Gan Based Multi-Channels FinfetsChun-Lin Yu, Chih-Hao Lin, and Yuh-Renn Wu (吳育任)IEEE Transactions on NanotechnologyVolume 19
65Prolonged Transient Behavior In Ultra-Thin Oxide Mis-Tunneling Diode Induced By Deep Depletion Of Surrounded Coupling ElectrodeTing-Hao Hsu and Jenn-Gwo Hwu (胡振國)IEEE Transactions on Electron DevicesVolume 67
66Improved Low-Voltage Sensing Performance In Mis(P) Tunnel Diodes By Oxide Thickening At The Gate FringeKuan-Wun Lin and Jenn-Gwo Hwu (胡振國)IEEE Transactions on Electron DevicesVolume 67
67Tungsten Diselenide Top-Gate Transistors With Multilayer Antimonene Electrodes: Gate Stacks And Epitaxially Grown 2D Material HeterostructuresYu-Wei Zhang, Jun-Yan Li, Chao-Hsin Wu (吳肇欣), Chiao-Yun Chang, Shu-Wei Chang (張書維), Min-Hsiung Shih and Shih-Yen Lin (林時彥)Scientific ReportsVolume 10
68Atomic Layer Densification Of Aln Passivation Layer On Epitaxial Ge For Enhancement Of Reliability And Electrical Performance Of High-K Gate StacksChin-I Wang, Teng-Jan Chang, Yu-Tung Yin, Yu-Sen Jiang, Jing-Jong Shyue and Miin-Jang Chen (陳敏璋)ACS Applied Electronic MaterialsVolume 2
69Ultra-Low Subthreshold Swing In Gated Mis(P) Tunnel Diodes With Engineered Oxide Local Thinning LayersTzu-Hao Chiang and Jenn-Gwo Hwu (胡振國)IEEE Transactions on Electron DevicesVolume 67
70Correlation Between Ferroelectricity And Nitrogen Incorporation Of Undoped Hafnium Dioxide CapacitorJun-Dao Luo, Yun-Tien Yeh, Yu-Ying Lai, Chia-Feng Wu, Hao-Tung Chung, Yi-Shao Li, Kai-Chi Chuang, Wei-Shuo Li, Pin-Guang Chen, Min-Hung Lee (李敏鴻), and Huang-Chung ChengVacuumVolume 176
71Van Der Waals Epitaxy Of Large-Area And Single-Crystalline Gold Films On Mos2 For Low-Contact-Resistance 2D-3D InterfacesKuan-Chao Chen, Syuan-Miao Lai, Bo-Yu Wu, Chi Chen, and Shih-Yen Lin (林時彥)ACS Applied Nano Materials Volume 3
72Size-Dependent Switching Properties Of Spin-Orbit Torque Mram With Manufacturing-Friendly 8-Inch Wafer-Level UniformitySk Ziaur Rahaman, I-Jung Wang, Ding-Yeong Wang, Chi-Feng Pai, Yu-Chen Hsin, Shan-Yi Yang, Hsin-Han Lee, Yao-Jen Chang, Yi-Ching Kuo, Yi-Hui Su, Guan-Long Chen, Fang-Ming Chen, Jeng-Hua Wei, Tuo-Hung Hou, Shyh-Shyuan Sheu, Chih-I Wu (吳志毅), and Duan-Lee DengIEEE Journal of the Electron Devices Society Volume 8
73Thermoelectric Transport Of The Half-Filled Lowest Landau Level In A P-Type Ge/Sige HeterostructureXiaoxue Liu, Tzu-Ming Lu, Charles Thomas Harris, Fang-Liang Lu, Chia-You Liu, Jiun-Yun Li, C. W. Liu (劉致為) and Rui-Rui DuPhysical Review BVolume 101
74Low- Temperature Crystallization And Paraelectric-Ferroelectric Phase Transformation In Nanoscale Zro2 Thin Films Induced By Atomic Layer Plasma TreatmentSheng-Han Yi, Kuei-Wen Huang, Hsin-Chih Lin and Miin-Jang Chen (陳敏璋)Journal of Materials Chemistry CVolume 8
75Topological Transition In A 3Nm Thick Al Film Grown By Molecular Beam EpitaxyAnkit Kumar,Guan-Ming Su, Chau-Shing Chang, Ching-Chen Yeh, Bi-Yi Wu, Dinesh K. Patel, Yen-Ting Fan, Sheng-Di Lin, Lee Chow, and Chi-Te Liang (梁啟德)Journal of NanomaterialsVolume 2019
76Bi-directional Sub-60mV/dec, Hysteresis-Free, Reducing Onset Voltage and High Speed Response of Ferroelectric-AntiFerroelectric Hf0.25Zr0.75O2 Negative Capacitance FETsM. H. Lee (李敏鴻), K.-T. Chen, C.-Y. Liao, G.-Y. Siang, C. Lo, H.-Y. Chen, Y.-J. Tseng, C.-Y. Chueh, C. Chang, Y.-Y. Lin, Y.-J. Yang, F.-C. Hsieh, S. T. Chang (張書通), M.-H. Liao, K.-S. Li, and C. W. Liu (劉致為)2019 IEEE International Electron Devices Meeting (IEDM)
77First Vertically Stacked Tensily Strained Ge0.98Si0.02 nGAAFETs with No Parasitic Channel and LG = 40 nm Featuring Record ION = 48 mA at VOV=VDS=0.5V and Record Gm,max (mS/m)/SSSAT(mV/dec) = 8.3 at VDS=0.5VChien-Te Tu, Yu-Shiang Huang, Fang-Liang Lu, Hsiao-Hsuan Liu, Chung-Yi Lin, Yi-Chun Liu, and C. W. Liu (劉致為)2019 IEEE International Electron Devices Meeting (IEDM)
78First Stacked Ge0.88Sn0.12 pGAAFETs with Cap, LG=40nm, Compressive Strain of 3.3%, and High S/D Doping by CVD Epitaxy Featuring Record ION of 58mA at VOV=VDS= -0.5V, Record Gm,max of 172mS at VDS= -0.5V, and Low NoiseYu-Shiang Huang, Chung-En Tsai, Chien-Te Tu, Hung-Yu Ye, Yi-Chun Liu, Fang-Liang Lu, and C. W. Liu (劉致為)2019 IEEE International Electron Devices Meeting (IEDM)
79Different Infrared Responses From The Stacked Channels And Parasitic Channel Of Stacked Gesn Channel TransistorsHisao-Hsuan Liu, Yu-Shiang Huang, Fang-Liang Lu, Hung-Yu Ye, and C. W. Liu (劉致為)IEEE Electron Device LettersVolume 41
80Self-Heating Induced Interchannel Vt Difference Of Vertically Stacked Si Nanosheet Gate-All-Around MosfetsChia-Che Chung, Hung-Yu Ye, H. H. Lin, W. K. Wan, M.-T. Yang, and C. W. Liu (劉致為)IEEE Electron Device LettersVolume 40
81Carrier Mobility Calculation For Monolayer Black PhosphorousKuan-Ting Chen, Min-Hsin Hsieh, Yen-Shuo Su, Wen-Jay Lee, and Shu-Tong Chang (張書通)Journal of Nanoscience and NanotechnologyVolume 19
82Multi-Layer Elemental 2D Materials: Antimonene, Germanene And Stanene Grown Directly On Molybdenum DisulfidesKuan-Chao Chen, Lun-Ming Lee, Hsuan-An Chen, Hsu Sun, Cheng-Lun Wu, Hsin-An Chen, Kuan-Bo Lin, Yen-Chun Tseng, Chao-Cheng Kaun, Chun-Wei Pao, and Shih-Yen Lin (林時彥)Semiconductor Science and Technology Volume 34
83Non-Markovianity, Information Backflow, And System-Environment CorrelationYun-Yi Hsieh, Zheng-Yao Su, and Hsi-Sheng Goan (管希聖)Physical Review AVolume 100
84Evaluation Of Sweep Modes For Switch Response On Ferroelectric Negative Capacitance FetsKuan-Ting Chen, Yu-Chen Chou, Gao-Yu Siang, Hong-Yu Chen, Chieh Lo, Chun-Yu Liao, Shu-Tong Chang (張書通), and Min-Hung Lee (李敏鴻)Applied Physics ExpressVolume 12
85Low-Temperature Conformal Atomic Layer Etching Of Si With A Damage-Free Surface For Next Generation Atomic-Scale ElectronicPo-Hsien Cheng, Chin-I Wang, Chen-Hsiang Ling, Chen-Hsuan Lu, Yu-Tung Yin, Miin-Jang Chen(陳敏璋)ACS Applied Nano MaterialsVolume 2
86First Vertically Stacked, Compressively Strained, and Triangular Ge0.91Sn0.09 pGAAFETs with High ION of 19.3uA at VOV=VDS=-0.5V, Gm of 50.2uS at VDS=-0.5V and Low SSlin of 84mV/dec by CVD Epitaxy and Orientation Dependent Etching Yu-Shiang Huang, Hung-Yu Ye, Fang-Liang Lu, Yi-Chun Liu, Chien-Te Tu, Chung-Yi Lin, Shih-Ya Lin, Sun-Rong Jan, and C. W. Liu (劉致為)2019 Symposium on VLSI Technology
87Record Low Contact Resistivity (4.4x10-10Ω-cm2) to Ge Using In-situ B and Sn Incorporation by CVD With Low Thermal Budget (≤400℃) and Without GaFang-Liang Lu, Chung-En Tsai, Chih-Hsiung Huang, Hung-Yu Ye, Shih-Ya Lin, and C. W. Liu (劉致為)2019 Symposium on VLSI Technology
88Thermal Spice Modeling Of Finfet And Beol Considering Frequency-Dependent Transient Response, 3-D Heat Flow, Boundary/Alloy Scattering, And Interfacial Thermal ResistanceC.-C. Chung, H. H. Lin, W. K. Wan, M.-T. Yang, and C. W. Liu (劉致為)IEEE Transactions on Electron DevicesVolume 66
89Roles Of Inner And Outer Fringe And Asymmetric Coupling Effect In Concentric Double-Mis(P) Tunneling DiodesYu-Hsuan Chen and Jenn-Gwo Hwu (胡振國)ECS TransactionsVolume 89
90High-Fidelity And Robust Two-Qubit Gates For Quantum-Dot Spin Qubits In SiliconC.-H. Huang, C. H. Yang, C.-C. Chen, A. S. Dzurak, and H.-S. Goan (管希聖)Physical Review AVolume 99
91Negative Capacitance From The Inductance Of Ferroelectric SwitchingPo-Hsien Cheng, Yu-Tung Yin, I-Na Tsai, Chen-Hsuan Lu, Lain-Jong Li, Samuel C. Pan, Jay Shieh, Makoto Shiojiri, and Miin-Jang Chen (陳敏璋)Nature Communications PhysicsVolume 2
92Single And Double Hole Quantum Dots In Strained Ge/Sige Quantum WellsW. J. Hardy, C. T. Harris, Y. H. Su, Y. Chuang, J. Moussa, L. N. Maurer, Jiun-Yun Li (李峻霣), T. M. Lu, and D. R. LuhmanNanotechnologyVolume 30
93The Atomic Layer Etching Mechanisms Of Molybdenum Disulfides By Using Oxygen PlasmaKuan-Chao Chen, Chia-Wei Liu, Chi Chen and Shih-Yen Lin (林時彥)Semiconductor Science and Technology Volume 34
94Quantum Phase Transition In Ultrahigh Mobility Sige/Si/Sige Two-Dimensional Electron SystemM. Yu. Melnikov, A. A. Shashkin, V. T. Dolgopolov, Amy Y. X. Zhu, S. V. Kravchenko, S.-H. Huang, and C. W. Liu (劉致為)Physical Review BVolume 99
95Non-Volatile Ferroelectric Fets Using 5-Nm Hf0.5Zr0.5O2 With High Data Retention And Read Endurance For 1T Memory ApplicationsK.-T. Chen, R.-C. Hong, C.-Y. Liao, H.-Y. Chen, S.-S. Gu, Z.-Y. Wang, Y.-C. Chou, S.-Y. Chen, G.-Y. Siang, J. Le, M.-H. Liao, K.-S. Li, S. T. Chang(張書通), and M. H. Lee (李敏鴻)IEEE Electron Device LettersVolume 40
96Electron Mobility Enhancement In An Undoped Si/Sige Heterostructure By Remote Carrier ScreeningY. H. Su, K. Y. Chou, Y. Chuang, T. M. Lu, and Jiun-Yun Li (李峻霣)Journal of Applied PhysicsVolume 125
97Photoresponse Of Homostructure Wse2 Rectifying DiodeT. H. Peng, C. H. Hong, M. R. Tang, and S. C. Lee (李嗣涔)AIP Advances Volume 9
98Effects Of Annealing Temperature And Nitrogen Content On Effective Work Function Of Tungsten NitrideChih-Hsiung Huang, Chung-En Tsai, Yu-Rui Chen, and C. W. Liu (劉致為)IEEE Electron Device LettersVolume 40
99Two Capacitance States Memory Characteristic In Metal-Oxide-Semiconductor (Mos) Structure Controlled By An Outer Mos Gate RingHao-Jyun Li, Chang-Feng Yang and Jenn-Gwo Hwu (胡振國)IEEE Transactions on Electron DevicesVolume 66
100Gate Oxide Local Thinning Mechanism Induced Sub-60 Mv/Decade Subthreshold Swing On Charge-Coupled Mis(P) Tunnel TransistorChang-Feng Yang , Bo-Jyun Chen, Wei-Chen Chen, Kuan-Wun Lin, and Jenn-Gwo Hwu (胡振國)IEEE Transactions on Electron DevicesVolume 66
101Enhanced Two States Current In Mos-Gated Mis Separate Write/Read Storage Device By Oxide Soft Breakdown In Remote GateWei-Chen Chen, Chang-Feng Yang and Jenn-Gwo Hwu (胡振國)IEEE Transactions on NanotechnologyVolume 18
102Mobility Calculation Of Ge Nanowire Junctionless And Inversion-Mode Nanowire Nfets With Size And Shape DependenceHung-Yu Ye, Chia-Che Chung, and C. W. Liu (劉致為)IEEE Transactions on Electron DevicesVolume 65
103Black Phosphorus With A Unique Rectangular Shape And Its Anisotropic PropertiesY. Hsiao, P. Y. Chang, K. L. Fan, N. C. Hsu, and S. C. Lee (李嗣涔)AIP AdvancesVolume 8
1043D Self-Consistent Quantum Transport Simulation For Gaas Gate-All-Around Nanowire Field-Effect Transistor With Elastic And Inelastic Scattering EffectsHan-Wei Hsiao and Yuh-Renn Wu (吳育任)Physica Status Solidi (a) Volume 216
105Current Enhancement And Bipolar Current Modulation Of Top-Gate Transistors Based On Monolayer Mos2 On Three-Layer Wxmo1-Xs2Kuan-Chao Chen, Cing-Yu Jian, Yi-Jia Chen, Si-Chen Lee, Shu-Wei Chang (張書維), and Shih-Yen Lin (林時彥)ACS Applied Materials & InterfacesVolume 10